The present invention relates to a bus switch circuit and an interactive level shifter.
In recent years, bus switch circuits are used in many products. For example, when first and second circuits which operate upon receiving a power supply voltage are connected, a bus switch circuit is used to, e.g., block the signal path to prevent any operation error caused when a signal output from the first circuit is input to the second circuit before the power supply voltage is supplied to the second circuit.
FIG. 10 shows the arrangement of a conventional bus switch circuit. The source and drain of a switch element SW formed from an n-channel transistor are connected between terminals A and B. The gate of the n-channel transistor is connected to a control terminal C through an inverter IN2.
A control signal is input from the control terminal C, inverted by the inverter IN2, and input to the gate of the switch element SW. When a control signal of low level is input, the switch element SW is turned on to connect the terminal A to the terminal B. When a control signal of high level is input, the switch element SW is turned off to disconnect the terminal A from the terminal B.
However, the conventional bus switch circuit has the following problem.
When a control signal of low level is input to turn on the switch element SW, a voltage input from the terminal A is externally output from the terminal B through the switch element SW. Alternatively, a voltage input from the terminal B is externally output from the terminal A through the switch element SW. At this time, because of the characteristics of the n-channel MOS transistor, a voltage VIN input to the terminal A or B drops by a threshold value Vth and is output from the terminal B or A as a voltage VIN-Vth.
In recent years, ICs (Integrated Circuits) which operate upon receiving different voltages, e.g., 3.3 V and 5 V, are often connected. In this case, an interactive level shifter must be inserted between the ICs to convert the high level of a signal.
A conventional level shifter has the arrangement shown in FIG. 11. Terminals A and B are connected to the input and output terminals of different ICs, respectively. A circuit CT1 is connected to the terminal A. A circuit CT2 is connected to the terminal B. A logic level converter LLC is inserted between the circuits.
The circuit CT1 has inverters IN31 to IN35 and AND circuits AN31 and AN32 and operates upon receiving a power supply voltage VccA. The circuit CT2 has inverters IN41 and IN42 and operates upon receiving a power supply voltage VccB.
A direction control signal DIR and switch control signal /G are input to the circuits CT1 and CT2. The terminals A and B are controlled by the switch control signal /G to a connectable state (switch enable) or a high-impedance unconnectable state (switch disable). In the switch enable mode, the input/output direction of a signal between the terminals A and B is determined by the direction control signal DIR.
However, the above-described conventional interactive level shifter has the following problems.
The two kinds of power supply voltages VccA and VccB are necessary for level shift, resulting in an increase in cost.
In addition, since each of the circuits CT1 and CT2 and logic level converter LLC is constituted by a logic circuit with a multi-stage structure, the signal propagation speed between the terminals A and B is low, resulting in a signal delay.
Furthermore, the logic level converter LLC can shift the level using a diode. However, for interactive level shift, a pull-up resistor must be externally attached to prevent any voltage drop by a switch element, resulting in an increase in device area. Simultaneously, power consumption increases due to a DC current that flows to the resistor in the switch disable mode.